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ERKNS_5TwineE_ZN4llvm10MCStreamer20emitCFIRememberStateENS_5SMLocE_ZN4llvm10MCStreamer15visitUsedSymbolERKNS_8MCSymbolELLVMInitializeWebAssemblyAsmParser_ZN4llvm10MCStreamer14emitAssignmentEPNS_8MCSymbolEPKNS_6MCExprELLVMInitializeARMTargetMC_ZN4llvm10MCStreamer24emitXCOFFRenameDirectiveEPKNS_8MCSymbolENS_9StringRefE_ZSt19piecewise_construct_ZTVN4llvm9ErrorListE_ZN4llvm10MCStreamer17emitValueToOffsetEPKNS_6MCExprEhNS_5SMLocE_ZN4llvm10MCStreamer19emitCFIRestoreStateENS_5SMLocE_ZN4llvm11raw_ostreamlsERKNS_18format_object_baseE_ZN4llvm17SubtargetFeaturesC1ENS_9StringRefE_ZN4llvm10MCStreamer36emitXCOFFSymbolLinkageWithVisibilityEPNS_8MCSymbolENS_12MCSymbolAttrES3__ZN4llvm9WithColor7warningEv_ZN4llvm3mca12InstrBuilder17createInstructionERKNS_6MCInstERKNS_11SmallVectorIPNS0_10InstrumentELj6EEE_ZN4llvm10MCStreamer20emitCFINegateRAStateENS_5SMLocE_ZN4llvm10MCStreamer19emitWinCFIPushFrameEbNS_5SMLocE_ZN4llvm4json6isUTF8ENS_9StringRefEPm_ZN4llvm10MCStreamer24emitXCOFFExceptDirectiveEPKNS_8MCSymbolES3_jjjbLLVMInitializeSystemZTargetMC_ZN4llvm10MCStreamer23emitCVDefRangeDirectiveENS_8ArrayRefISt4pairIPKNS_8MCSymbolES5_EEENS_9StringRefE_ZN4llvm10MCStreamer16emitCOFFSecRel32EPKNS_8MCSymbolEm_ZN4llvm10MCStreamer23emitDwarfFile0DirectiveENS_9StringRefES1_St8optionalINS_3MD59MD5ResultEES2_IS1_Ej_ZN4llvm10MCStreamer21emitDwarfLocDirectiveEjjjjjjNS_9StringRefE_ZN4llvm9SourceMgr9SrcBufferD1Ev_ZN4llvm10MCStreamer20emitWinCFIAllocStackEjNS_5SMLocE_ZN4llvm2mc28RegisterMCTargetOptionsFlagsC1Ev_ZN4llvm10MCStreamer5resetEv_ZTVN4llvm2cl6parserIbEE_ZN4llvm10MCStreamer16emitTPRel32ValueEPKNS_6MCExprE_ZN4llvm3mca7Context21createDefaultPipelineERKNS0_15PipelineOptionsERNS0_9SourceMgrERNS0_15CustomBehaviourE_ZN4llvm2cl20HideUnrelatedOptionsENS_8ArrayRefIPKNS0_14OptionCategoryEEERNS0_10SubCommandE_ZTVN4llvm3mca17InstructionTablesE_ZTVN4llvm3mca10EntryStageE_ZN4llvm2cl14OptionCategory16registerCategoryEv_ZN4llvm10MCStreamer8emitFillERKNS_6MCExprEmNS_5SMLocE_ZN4llvm12DenseMapInfoINS_9StringRefEvE12getHashValueES1__ZN4llvm4json5Value8moveFromEOKS1__ZNK4llvm2cl19generic_parser_base15printOptionInfoERKNS0_6OptionEm_ZN4llvm15MCTargetOptionsC1Ev_ZN4llvm10MCStreamer17emitCodeAlignmentENS_5AlignEPKNS_15MCSubtargetInfoEjLLVMInitializeNVPTXTargetInfo_ZN4llvm10MCStreamer17emitXCOFFCInfoSymENS_9StringRefES1__ZN4llvm4json7fixUTF8B5cxx11ENS_9StringRefE_ZN4llvm10MCStreamer18emitCFIPersonalityEPKNS_8MCSymbolEj_ZTVN4llvm21formatted_raw_ostreamE_ZN4llvm10MCStreamer9emitBytesENS_9StringRefE_ZTIN4llvm13format_objectIJdEEE_ZN4llvm10MCStreamer16emitTPRel64ValueEPKNS_6MCExprE_ZN4llvm10MCStreamer20emitCOFFSectionIndexEPKNS_8MCSymbolELLVMInitializeWebAssemblyTargetInfo_ZNK4llvm6Triple11getArchNameEv_ZN4llvm10MCStreamer19emitCVFileDirectiveEjNS_9StringRefENS_8ArrayRefIhEEj_ZN4llvm17createMCAsmParserERNS_9SourceMgrERNS_9MCContextERNS_10MCStreamerERKNS_9MCAsmInfoEj_ZN4llvm10MCStreamer19emitCFIReturnColumnEl_ZN4llvm6Triple9normalizeB5cxx11ENS_9StringRefE_ZN4llvm10MCStreamer19emitDwarfUnitLengthEmRKNS_5TwineE_ZN4llvm10MCStreamer19emitBundleAlignModeENS_5AlignE_ZN4llvm11MCAsmParser15setTargetParserERNS_17MCTargetAsmParserELLVMInitializeARMTargetInfo_ZN4llvm4errsEv_ZN4llvm10MCStreamer27emitCVInlineSiteIdDirectiveEjjjjjNS_5SMLocE_ZN4llvm10MCStreamer19emitDwarfUnitLengthERKNS_5TwineES3_LLVMInitializeWebAssemblyTargetMC_ZN4llvm21formatted_raw_ostream15ComputePositionEPKcm_ZN4llvm10MCStreamer22emitWinCFIStartChainedENS_5SMLocE_ZN4llvm2cl16AddLiteralOptionERNS0_6OptionENS_9StringRefE_ZN4llvm10MCStreamer15emitPseudoProbeEmmmmmRKNS_11SmallVectorISt5tupleIJmjEELj8EEEPNS_8MCSymbolELLVMInitializeX86TargetInfo_ZTIN4llvm2cl6OptionE_ZN4llvm10MCStreamer18emitWinCFISetFrameENS_10MCRegisterEjNS_5SMLocE_ZTVN4llvm2cl11OptionValueINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEE_ZNK4llvm9StringRef17find_first_not_ofES0_m_ZN4llvm12MCSchedModel19computeInstrLatencyERKNS_15MCSubtargetInfoERKNS_16MCSchedClassDescE_ZTSN4llvm13format_objectIJhEEE_ZN4llvm9ErrorList2IDE_ZN4llvm10MCStreamer23emitWindowsUnwindTablesEv_ZTVN4llvm2cl3optIiLb0ENS0_6parserIiEEEE_ZN4llvm10MCStreamer16emitCFISameValueElNS_5SMLocE_ZNK4llvm2cl17basic_parser_impl14getOptionWidthERKNS0_6OptionE_ZN4llvm9MCContextD1Ev_ZN4llvm10MCStreamer31emitAbsoluteSymbolDiffAsULEB128EPKNS_8MCSymbolES3__ZN4llvm13StringMapImpl15LookupBucketForENS_9StringRefEj_ZN4llvm10MCStreamer11emitCFILsdaEPKNS_8MCSymbolEj_ZN4llvm14TargetRegistry32printRegisteredTargetsForVersionERNS_11raw_ostreamE_ZN4llvm17deallocate_bufferEPvmm_ZN4llvm10MCStreamer17emitWeakReferenceEPNS_8MCSymbolEPKS1__ZN4llvm10MCStreamer19emitCOFFSymbolIndexEPKNS_8MCSymbolE_ZN4llvm10MCStreamer19emitWinCFIStartProcEPKNS_8MCSymbolENS_5SMLocE_ZN4llvm10MCStreamerC2ERNS_9MCContextE_ZN4llvm10MCStreamer19emitEHSymAttributesEPKNS_8MCSymbolEPS1__ZN4llvm2cl6Option11addArgumentEv_ZN4llvm10MCStreamer19emitCFIDefCfaOffsetElNS_5SMLocE_ZN4llvm9WithColor5errorEv_ZN4llvm2cl6Option13addOccurrenceEjNS_9StringRefES2_b_ZTVN4llvm2cl6parserIiEE_ZN4llvm2cl10SubCommand11getTopLevelEv_ZN4llvm9SourceMgr9SrcBufferC1EOS1_LLVMInitializeAArch64TargetInfo_ZN4llvm10MCStreamer16emitCFIRelOffsetEllNS_5SMLocE_ZN4llvm3sys22getDefaultTargetTripleB5cxx11Ev_ZN4llvm2cl22AddExtraVersionPrinterESt8functionIFvRNS_11raw_ostreamEEE_ZN4llvm10MCStreamer13emitValueImplEPKNS_6MCExprEjNS_5SMLocE_ZN4llvm10MCStreamer20emitWinCFIEndChainedENS_5SMLocE_ZN4llvm10MCStreamer17emitDTPRel32ValueEPKNS_6MCExprE_ZN4llvm13StringMapImpl9RemoveKeyEPNS_18StringMapEntryBaseE_ZTVN4llvm2cl6parserINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEE_ZN4llvm14TargetRegistry12lookupTargetENS_9StringRefERNS_6TripleERNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEELLVMInitializeBPFTargetMC_ZTVN4llvm2cl6parserIjEE_ZN4llvm10MCStreamer22emitCFIAdjustCfaOffsetElNS_5SMLocE_ZN4llvm10MCStreamer16emitULEB128ValueEPKNS_6MCExprE_ZN4llvm10MCStreamer17emitWinCFIPushRegENS_10MCRegisterENS_5SMLocE_ZN4llvm10MCStreamer15emitCFISectionsEbb_ZN4llvm2cl18getGeneralCategoryEv_ZN4llvm10MCStreamer17emitCFIWindowSaveENS_5SMLocE_ZN4llvm10MCStreamer23emitCFILLVMDefAspaceCfaElllNS_5SMLocE_ZN4llvm10MCStreamer15emitCFIRegisterEllNS_5SMLocE_ZN4llvm19SmallPtrSetImplBase14insert_imp_bigEPKv_ZN4llvm2cl6Option9setArgStrENS_9StringRefE_ZN4llvm10MCStreamer15emitCOFFSafeSEHEPKNS_8MCSymbolE_ZN4llvm10MCStreamer17emitDTPRel64ValueEPKNS_6MCExprE_ZN4llvm10MCStreamer9emitLabelEPNS_8MCSymbolENS_5SMLocE_ZN4llvm10MCStreamer23emitCVDefRangeDirectiveENS_8ArrayRefISt4pairIPKNS_8MCSymbolES5_EEENS_8codeview22DefRangeRegisterHeaderE_ZN4llvm12MCSchedModel23getReciprocalThroughputERKNS_15MCSubtargetInfoERKNS_16MCSchedClassDescE_ZN4llvm10MCStreamer17emitWinCFIEndProcENS_5SMLocE_ZN4llvm18format_object_base4homeEv_ZN4llvm22inconvertibleErrorCodeEv_ZN4llvm5nullsEv_ZN4llvm10MCStreamer17emitFileDirectiveENS_9StringRefE_ZN4llvm10MCStreamer14emitTBSSSymbolEPNS_9MCSectionEPNS_8MCSymbolEmNS_5AlignE_ZN4llvm10MCStreamer12emitIntValueERKNS_5APIntE_ZTIN4llvm2cl19generic_parser_baseE_ZN4llvm3mca5StageD2Ev_ZN4llvm10MCStreamer8emitNopsEllNS_5SMLocERKNS_15MCSubtargetInfoE_ZN4llvm10MCStreamer20emitValueToAlignmentENS_5AlignEljj_ZN4llvm10MCStreamer20emitWinEHHandlerDataENS_5SMLocE_ZN4llvm10MCStreamer23emitCVDefRangeDirectiveENS_8ArrayRefISt4pairIPKNS_8MCSymbolES5_EEENS_8codeview25DefRangeRegisterRelHeaderE_ZNK4llvm2cl19generic_parser_base14getOptionWidthERKNS0_6OptionE_ZN4llvm2cl18GenericOptionValue6anchorEvLLVMInitializeAArch64TargetMC_ZN4llvm10MCStreamer20switchSectionNoPrintEPNS_9MCSectionE_ZTIN4llvm18format_object_baseE_ZTVN4llvm18raw_string_ostreamE_ZN4llvm15format_providerINS_4json5ValueEvE6formatERKS2_RNS_11raw_ostreamENS_9StringRefE_ZN4llvm10MCStreamer21emitCFILabelDirectiveENS_5SMLocENS_9StringRefE_ZNK4llvm9StringRef4findES0_m_ZN4llvm9MCContextC1ERKNS_6TripleEPKNS_9MCAsmInfoEPKNS_14MCRegisterInfoEPKNS_15MCSubtargetInfoEPKNS_9SourceMgrEPKNS_15MCTargetOptionsEbNS_9StringRefE_ZN4llvm10MCStreamer11emitELFSizeEPNS_8MCSymbolEPKNS_6MCExprELLVMInitializeARMAsmParserLLVMInitializeX86AsmParser_ZN4llvm11StringError2IDE_ZN4llvm10MCStreamer13emitCFIEscapeENS_9StringRefENS_5SMLocE_ZN4llvm10MCStreamer21emitCFIDefCfaRegisterElNS_5SMLocE_ZN4llvm2cl6Option5errorERKNS_5TwineENS_9StringRefERNS_11raw_ostreamELLVMInitializeSystemZTargetInfo_ZTVN4llvm2cl3optIbLb0ENS0_6parserIbEEEELLVMInitializeNVPTXTargetMC_ZN4llvm10MCStreamer16emitCFIUndefinedElNS_5SMLocE_ZN4llvm10MCStreamer21emitCFIMTETaggedFrameEv_ZN4llvm3mca23computeBlockRThroughputERKNS_12MCSchedModelEjjNS_8ArrayRefIjEE_ZN4llvm10MCStreamer16emitCOFFImgRel32EPKNS_8MCSymbolEl_ZN4llvm10MCStreamer25tryEmitDwarfFileDirectiveEjNS_9StringRefES1_St8optionalINS_3MD59MD5ResultEES2_IS1_Ej_ZNK4llvm2cl17basic_parser_impl15printOptionInfoERKNS0_6OptionEmLLVMInitializeBPFTargetInfo_ZN4llvm15SmallVectorBaseIjE8grow_podEPvmm_ZN4llvm11raw_ostream5writeEh_ZN4llvm10MCStreamer16emitBundleUnlockEv_ZN4llvm10MCStreamer23emitCVDefRangeDirectiveENS_8ArrayRefISt4pairIPKNS_8MCSymbolES5_EEENS_8codeview30DefRangeSubfieldRegisterHeaderE_ZTIN4llvm10MCStreamerE_ZN4llvm10MCStreamer26emitXCOFFLocalCommonSymbolEPNS_8MCSymbolEmS2_NS_5AlignE_ZTIN4llvm13format_objectIJhEEELLVMInitializePowerPCTargetInfo_ZN4llvm10MCStreamer21emitCVFuncIdDirectiveEj_ZTIN4llvm3mca9SourceMgrE_ZN4llvm10MCStreamer15emitRawTextImplENS_9StringRefE_ZN4llvm10MCStreamer10finishImplEv_ZN4llvm10MCStreamer14emitBinaryDataENS_9StringRefE_ZN4llvm10MCStreamer17emitWinCFISaveXMMENS_10MCRegisterEjNS_5SMLocE_ZN4llvm11raw_ostream11changeColorENS0_6ColorsEbbLLVMInitializeX86TargetMC_ZN4llvm10MCStreamer12initSectionsEbRKNS_15MCSubtargetInfoELLVMInitializeSystemZAsmParser_ZTIN4llvm3mca4ViewE_ZN4llvm10MCStreamer17emitAssemblerFlagENS_15MCAssemblerFlagE_ZN4llvm2cl6Option11addCategoryERNS0_14OptionCategoryE_ZN4llvm10MCStreamer22emitELFSymverDirectiveEPKNS_8MCSymbolENS_9StringRefEb_ZN4llvm4json6Object8getArrayENS_9StringRefE_ZN4llvm10MCStreamer13emitThumbFuncEPNS_8MCSymbolE_ZN4llvm15allocate_bufferEmm_ZN4llvm2mc28InitMCTargetOptionsFromFlagsEvLLVMInitializeAMDGPUAsmParser_ZN4llvm3mca12InstrBuilderC1ERKNS_15MCSubtargetInfoERKNS_11MCInstrInfoERKNS_14MCRegisterInfoEPKNS_15MCInstrAnalysisERKNS0_17InstrumentManagerEj_ZN4llvm21formatted_raw_ostream11PadToColumnEj_ZN4llvm3mca8Pipeline16addEventListenerEPNS0_15HWEventListenerE_ZSt21__glibcxx_assert_failPKciS0_S0__ZTSN4llvm3mca9SourceMgrE_ZN4llvm11raw_ostream5writeEPKcm_ZN4llvm10MCStreamer22emitAbsoluteSymbolDiffEPKNS_8MCSymbolES3_j_ZN4llvm11raw_ostreamlsERKNS_19formatv_object_baseE_ZN4llvm16CleanupInstallerD1Ev_ZTVN4llvm2cl6OptionE_ZN4llvm3mca8Pipeline3runEv_ZN4llvm4json5Value8copyFromERKS1__ZN4llvm10MCStreamer16emitCFIBKeyFrameEv_ZN4llvm10MCStreamer12emitCFILabelEv_ZTVN10__cxxabiv121__vmi_class_type_infoE_ZSt20__throw_length_errorPKc_ZSt9terminatev_ZdlPvm_ZNSt3_V215system_categoryEv_ZTVN10__cxxabiv120__function_type_infoE_ZSt29_Rb_tree_insert_and_rebalancebPSt18_Rb_tree_node_baseS0_RS__ZSt25__throw_bad_function_callv_ZSt18_Rb_tree_incrementPSt18_Rb_tree_node_base_Znam_ZTVN10__cxxabiv117__class_type_infoE_ZTVN10__cxxabiv119__pointer_type_infoE_ZTVN10__cxxabiv120__si_class_type_infoE__cxa_begin_catch__cxa_pure_virtual__gxx_personality_v0_Znwm__cxa_rethrow_ZSt18_Rb_tree_incrementPKSt18_Rb_tree_node_base__cxa_end_catch_ZSt18_Rb_tree_decrementPSt18_Rb_tree_node_base_ZSt19__throw_logic_errorPKc_Unwind_ResumelibLLVM.so.19.1libstdc++.so.6libgcc_s.so.1libc.so.6GCC_3.0GLIBC_2.14GLIBC_2.34GLIBC_2.4GLIBC_2.2.5GLIBCXX_3.4.14GLIBCXX_3.4.21GLIBCXX_3.4CXXABI_1.3.9CXXABI_1.3LLVM_19.1    
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HH|$`ldH%(H;$uH|f.fC ÐPXHHt/HtGHt*HIHIɉH5dH81HtHH5dH81HHTool OptionsView Options<input file>Output filenameTarget architecture. See -version for available targetsTarget triple. See -version for available targetsTarget a specific cpu type (-mcpu=help for details)cpu-namenativemattrTarget specific attributes (-mattr=help for details)a1,+a2,-a3,...jsonPrint the output in json formatoutput-asm-variantSyntax variant to use for output printingprint-imm-hexPrefer hex format when printing immediate valuesNumber of iterations to runOverride the processor dispatch widthMaximum number of physical registers which can be used for register mappingsNumber of entries in the micro-op queueMaximum throughput from the decoders (instructions per cycle)call-latencyNumber of cycles to assume for a call instructionskip-unsupported-instructionsForce analysis to continue in the presence of unsupported instructionsnoneExit with an error when an instruction is unsupported for any reason (default)lack-schedSkip instructions on input which lack scheduling informationparse-failureSkip lines on the input which fail to parse for any reasonanySkip instructions or lines on input which are unsupported for any reasonregister-file-statsPrint register file statisticsdispatch-statsPrint dispatch statisticssummary-viewPrint summary view (enabled by default)scheduler-statsPrint scheduler statisticsretire-statsPrint retire control unit statisticsresource-pressurePrint the resource pressure view (enabled by default)timelinePrint the timeline viewtimeline-max-iterationsMaximum number of iterations to print in timeline viewtimeline-max-cyclesMaximum number of cycles in the timeline view, or 0 for unlimited. Defaults to 80 cyclesIf set, assume that loads and stores do not aliasSize of the load queueSize of the store queueinstruction-tablesPrint instruction tablesinstruction-infoPrint the instruction info view (enabled by default)all-statsPrint all hardware statisticsall-viewsPrint all views including hardware statisticsbottleneck-analysisEnable bottleneck analysis (disabled by default)show-encodingPrint encoding information in the instruction info viewshow-barriersPrint memory barrier information in the instruction info viewdisable-cbDisable custom behaviour (use the default class which does nothing).disable-imDisable instrumentation manager (use the default class which ignores instruments.).llvm machine code performance analyzer.
unable to find instruction-level scheduling information for' and cpu ''.
' provides itineraries. However, instruction itineraries are currently unsupported.
unable to create instruction printer for target triple '' with assembly variant no assembly instructions found.
bottleneck analysis is not supported for in-order CPU '{0:2}basic_string: construction from null is not validbasic_string::_M_createvector::_M_realloc_append/opt/rh/gcc-toolset-14/root//usr/lib/gcc/x86_64-redhat-linux/14/../../../../include/c++/14/bits/stl_vector.h!this->empty()Cannot find option named ''!basic_string::_M_replace/opt/rh/gcc-toolset-14/root//usr/lib/gcc/x86_64-redhat-linux/14/../../../../include/c++/14/bits/unique_ptr.htypename add_lvalue_reference<element_type>::type std::unique_ptr<std::basic_string<char>>::operator*() const [_Tp = std::basic_string<char>, _Dp = std::default_delete<std::basic_string<char>>]get() != pointer()typename add_lvalue_reference<element_type>::type std::unique_ptr<llvm::mca::Instruction>::operator*() const [_Tp = llvm::mca::Instruction, _Dp = std::default_delete<llvm::mca::Instruction>]typename add_lvalue_reference<element_type>::type std::unique_ptr<llvm::MCRegisterInfo>::operator*() const [_Tp = llvm::MCRegisterInfo, _Dp = std::default_delete<llvm::MCRegisterInfo>]typename add_lvalue_reference<element_type>::type std::unique_ptr<llvm::MCAsmInfo>::operator*() const [_Tp = llvm::MCAsmInfo, _Dp = std::default_delete<llvm::MCAsmInfo>]typename add_lvalue_reference<element_type>::type std::unique_ptr<llvm::MCInstrInfo>::operator*() const [_Tp = llvm::MCInstrInfo, _Dp = std::default_delete<llvm::MCInstrInfo>]typename add_lvalue_reference<element_type>::type std::unique_ptr<llvm::MCSubtargetInfo>::operator*() const [_Tp = llvm::MCSubtargetInfo, _Dp = std::default_delete<llvm::MCSubtargetInfo>]typename add_lvalue_reference<element_type>::type std::unique_ptr<llvm::ErrorInfoBase>::operator*() const [_Tp = llvm::ErrorInfoBase, _Dp = std::default_delete<llvm::ErrorInfoBase>]reference std::vector<std::unique_ptr<llvm::ErrorInfoBase>>::back() [_Tp = std::unique_ptr<llvm::ErrorInfoBase>, _Alloc = std::allocator<std::unique_ptr<llvm::ErrorInfoBase>>]vector::_M_realloc_inserttypename add_lvalue_reference<element_type>::type std::unique_ptr<llvm::MCAsmBackend>::operator*() const [_Tp = llvm::MCAsmBackend, _Dp = std::default_delete<llvm::MCAsmBackend>]typename add_lvalue_reference<element_type>::type std::unique_ptr<llvm::MCCodeEmitter>::operator*() const [_Tp = llvm::MCCodeEmitter, _Dp = std::default_delete<llvm::MCCodeEmitter>], skipping with -skip-unsupported-instructions, note accuracy will be impacted:
, use -skip-unsupported-instructions=lack-sched to ignore these on the input.
instruction: typename add_lvalue_reference<element_type>::type std::unique_ptr<llvm::mca::Pipeline>::operator*() const [_Tp = llvm::mca::Pipeline, _Dp = std::default_delete<llvm::mca::Pipeline>]typename add_lvalue_reference<element_type>::type std::unique_ptr<llvm::mca::CodeRegion>::operator*() const [_Tp = llvm::mca::CodeRegion, _Dp = std::default_delete<llvm::mca::CodeRegion>]typename add_lvalue_reference<element_type>::type std::unique_ptr<llvm::MCInstPrinter>::operator*() const [_Tp = llvm::MCInstPrinter, _Dp = std::default_delete<llvm::MCInstPrinter>]found multiple overlapping anonymous regionsPrevious anonymous region was defined hereoverlapping regions cannot have the same name was previously defined herefound an invalid region end directiveunable to find an active region named unable to find an active anonymous regionanonymous instrumentation regions are not permittedoverlapping instrumentation regions cannot be of the same kindinstrumentation region found an invalid instrumentation region end directiveunable to find an active instrumentation region named reference std::vector<std::unique_ptr<llvm::mca::CodeRegion>>::back() [_Tp = std::unique_ptr<llvm::mca::CodeRegion>, _Alloc = std::allocator<std::unique_ptr<llvm::mca::CodeRegion>>]reference std::vector<std::unique_ptr<llvm::mca::CodeRegion>>::operator[](size_type) [_Tp = std::unique_ptr<llvm::mca::CodeRegion>, _Alloc = std::allocator<std::unique_ptr<llvm::mca::CodeRegion>>]__n < this->size()This target does not support assembly parsing.Assembly input parsing had errors, use -skip-unsupported-instructions=parse-failure to drop failing lines from the input.There was an error parsing comments.     LLVM-MCA-ENDLLVM-MCA-BEGINLLVM-MCA-No instrumentation kind was provided in LLVM-MCA commentUnknown instrumentation type in LLVM-MCA comment: Failed to create  instrument with no data instrument with data: 
[] Code Region-mcpu-mtriple-march-register-file-size-noalias-decoder-throughput-micro-op-queue-size-dispatch-lqueue-squeueCPUNameResourcesTargetInfoSimulationParametersCodeRegionsreference std::vector<llvm::json::Value>::back() [_Tp = llvm::json::Value, _Alloc = std::allocator<llvm::json::Value>]basic_string::append
Critical sequence based on the simulation:

InstructionDependency Information
 +----< 
 |
 |    < loop carried > 
 |
        
 |      
 +----> ## REGISTER dependency:  ## MEMORY dependency.## RESOURCE interference:   [ probability: % ]

No resource or data dependency bottlenecks discovered.


Cycles with backend pressure increase [ %.2f
Throughput Bottlenecks: 
  Resource Pressure       [ 
  - 
  Data Dependencies:      [ 
  - Register Dependencies [ 
  - Memory Dependencies   [ % ]
BottleneckAnalysis

Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
[# dispatched], [# cycles]
,                (%.1f%)


Dynamic Dispatch Stall Cycles:
RAT     - Register unavailable:                      
RCU     - Retire tokens unavailable:                 
SCHEDQ  - Scheduler full:                            
LQ      - Load queue full:                           
SQ      - Store queue full:                          
GROUP   - Static restrictions on the dispatch group: 
USH     - Uncategorised Structural Hazard:           RATRCUSCHEDQLQSQGROUPUSHDispatchStatistics

Instruction Info:
[1]: #uOps
[2]: Latency
[3]: RThroughput
[4]: MayLoad
[5]: MayStore
[6]: HasSideEffects (U)
[7]: LoadBarrier
[8]: StoreBarrier
[9]: Encoding Size

[1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    Encodings:                    Instructions:
[7]: Encoding Size

[1]    [2]    [3]    [4]    [5]    [6]    [7]    
[1]    [2]    [3]    [4]    [5]    [6]     -      *      U     %02x NumMicroOpcodesLatencymayLoadmayStorehasUnmodeledSideEffectsInstructionListInstructionInfoView     
Instructions

Register File statistics:
Total number of mappings created:    
Max number of mappings used:         
*  Register File # -- 
   Number of physical registers:     unbounded
   Total number of mappings created: 
   Max number of mappings used:         Number of optimizable moves:      
   Number of moves eliminated:       (%.1f%%)
   Number of zero moves:             
   Max moves eliminated per cycle:   RegisterFileStatisticsnot implemented

Resources:


Resource pressure per iteration:


Resource pressure by instruction:
InstructionIndexResourceIndexResourceUsageResourcePressureInfoResourcePressureViewvector::_M_default_appendreference std::vector<llvm::mca::ReleaseAtCycles>::operator[](size_type) [_Tp = llvm::mca::ReleaseAtCycles, _Alloc = std::allocator<llvm::mca::ReleaseAtCycles>]const_reference std::vector<llvm::mca::ReleaseAtCycles>::operator[](size_type) const [_Tp = llvm::mca::ReleaseAtCycles, _Alloc = std::allocator<llvm::mca::ReleaseAtCycles>]

Retire Control Unit - number of cycles where we saw N instructions retired:
[# retired], [# cycles]
,           ,          
Total ROB Entries:                
Max Used ROB Entries:               ( %.1f%% )
Average Used ROB Entries per cy:    ( %.1f%% )
RetireControlUnitStatistics

Schedulers - number of cycles where we saw N micro opcodes issued:
[# issued], [# cycles]

Scheduler's queue usage:
No scheduler resources used.
[1] Resource name.
[2] Average number of used buffer entries.
[3] Maximum number of used buffer entries.
[4] Total number of buffer entries.

 [1]            [2]        [3]        [4]
SchedulerStatisticsreference std::vector<llvm::mca::SchedulerStatistics::BufferUsage>::operator[](size_type) [_Tp = llvm::mca::SchedulerStatistics::BufferUsage, _Alloc = std::allocator<llvm::mca::SchedulerStatistics::BufferUsage>]const_reference std::vector<llvm::mca::SchedulerStatistics::BufferUsage>::operator[](size_type) const [_Tp = llvm::mca::SchedulerStatistics::BufferUsage, _Alloc = std::allocator<llvm::mca::SchedulerStatistics::BufferUsage>]Iterations:        
Instructions:      
Total Cycles:      
Total uOps:        
Dispatch Width:    
uOps Per Cycle:    
IPC:               
Block RThroughput: IterationsTotalCyclesTotaluOpsDispatchWidthuOpsPerCycleIPCBlockRThroughputSummaryView

Average Wait times (based on the timeline view):
[0]: Executions
[1]: Average time spent waiting in a scheduler's queue
[2]: Average time spent waiting in a scheduler's queue while ready
[3]: Average time elapsed from WB until retire stage

      [0]    [1]    [2]    [3]
<total>Truncated display due to cycle limit
CycleDispatchedCycleReadyCycleIssuedCycleExecutedCycleRetiredTimelineInfo

Timeline view:
TimelineViewcannot create std::vector larger than max_size()reference std::vector<std::pair<unsigned int, int>>::operator[](size_type) [_Tp = std::pair<unsigned int, int>, _Alloc = std::allocator<std::pair<unsigned int, int>>]reference std::vector<llvm::mca::TimelineView::WaitTimeEntry>::operator[](size_type) [_Tp = llvm::mca::TimelineView::WaitTimeEntry, _Alloc = std::allocator<llvm::mca::TimelineView::WaitTimeEntry>]const_reference std::vector<std::pair<unsigned int, int>>::operator[](size_type) const [_Tp = std::pair<unsigned int, int>, _Alloc = std::allocator<std::pair<unsigned int, int>>]const_reference std::vector<llvm::mca::TimelineView::WaitTimeEntry>::operator[](size_type) const [_Tp = llvm::mca::TimelineView::WaitTimeEntry, _Alloc = std::allocator<llvm::mca::TimelineView::WaitTimeEntry>]const_reference std::vector<llvm::mca::TimelineView::TimelineViewEntry>::operator[](size_type) const [_Tp = llvm::mca::TimelineView::TimelineViewEntry, _Alloc = std::allocator<llvm::mca::TimelineView::TimelineViewEntry>]#C[A@N4llvm2cl15OptionValueCopyINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEE0C"CC@$C\AaA0@@@ aA@aA`aAaAaAcAP@N4llvm2cl4listINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEbNS0_6parserIS7_EEEEN4llvm2cl12list_storageINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEbEEC#CC#CC0$CP%CeAfA0@ @fA@gA`gAgAhA hAP@N4llvm2cl3optI8SkipTypeLb0ENS0_6parserIS2_EEEEN4llvm2cl11opt_storageI8SkipTypeLb0ELb0EEEC%CC$CC@%C%CdAhAiA iA@iAp@`iAУ@N4llvm2cl6parserI8SkipTypeEE0C%CC&CiA@N4llvm2cl11OptionValueI8SkipTypeEEN4llvm2cl15OptionValueBaseI8SkipTypeLb0EEEN4llvm2cl15OptionValueCopyI8SkipTypeEE0C~&CC0CS&C&C0C0&C&C&CiA@(CiAZAiA`5A jA0jA@jA(CPjApjAjAjAjAkA8(CP@iAiAP@N4llvm3mca23AnalysisRegionGeneratorEC(C>CN4llvm3mca26AsmAnalysisRegionGeneratorEC`(C8(C0?CP.Cp@P@`@@@@0@kA@@0kA@@kAPkA`kApkA@@@0@kA@@@kA@`@@kAkAkAkAkA@@@@@kAP@lAlA lA0lA`@@@@@Х@@@`@@p@0@@@lAPlA`lA0@plAЩ@@@`@p@@ @lAlA@Ц@@@ @@@lA`@@@б@P@@@@@lA@@@@@p@p@@@ @@@@@@@@lAlAlAlAP@@ @@@@@@p@0@0@@P@Ъ@@ @ @p@@@@@@0@@@0@@@а@@0@@@ @@@@@P@@@@mAmA mA0mA@@@@ @@mA @@@`@PmA`mApmAN4llvm3mca17MCStreamerWrapperE0C-CC/CmAYAmA6AnA nA0nA/C@nA`nAnAnAnAnAP/CP@mAmAP@N4llvm3mca25InstrumentRegionGeneratorEC(/C>CN4llvm3mca28AsmInstrumentRegionGeneratorECx/CP/C0?CP85Cp@P@`@@@@0@oA@@0kA@@kAPkA`kApkA@@@0@kA@@@kA@`@@kAkAkAkAkA@@@@@kAP@lAlA lA0lA`@@@@@Х@@@`@@p@0@@@lAPlA`lA0@plAЩ@@@`@p@@ @lAlA@Ц@@@ @@@lA`@@@б@P@@@@@lA@@@@@p@p@@@ @@@@@@@@lAlAlAlAP@@ @@@@@@p@0@0@@P@Ъ@@ @ @p@@@@@@0@@@0@@@а@@0@@@ @@@@@P@@@@mAmA mA oA@@@@ @@mA @@@`@PmA`mApmAN4llvm3mca20InstrumentMCStreamerE0C5C.C5CP{A`{Ap{A{A{A{APUA|AN4llvm3mca17CircularSourceMgrEN4llvm3mca9SourceMgrEC5C0C5C5Cx6C@}A}A0~AN4llvm7support6detail23provider_format_adapterINS_4json5ValueEEE0C06CCN4llvm2cl3optINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEELb0ENS0_6parserIS7_EEEUlRKS7_E_EC6CN4llvm2cl4listINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEbNS0_6parserIS7_EEEUlRKS7_E_EC7C08CA@N4llvm2cl11OptionValueIbEEN4llvm2cl15OptionValueBaseIbLb0EEEN4llvm2cl15OptionValueCopyIbEE0C7CC0C7C8C0C7C8CN4llvm2cl3optIbLb0ENS0_6parserIbEEEUlRKbE_ECH8C89C@A@N4llvm2cl11OptionValueIiEEN4llvm2cl15OptionValueBaseIiLb0EEEN4llvm2cl15OptionValueCopyIiEE0C8CC0C8C9C0C8C 9CN4llvm2cl3optIiLb0ENS0_6parserIiEEEUlRKiE_ECP9C@:CA@N4llvm2cl11OptionValueIjEEN4llvm2cl15OptionValueBaseIjLb0EEEN4llvm2cl15OptionValueCopyIjEE0C9CC0C9C:C0C9C(:CN4llvm2cl3optIjLb0ENS0_6parserIjEEEUlRKjE_ECX:CN4llvm2cl3optI8SkipTypeLb0ENS0_6parserIS2_EEEUlRKS2_E_EC:CPFvRN4llvm11raw_ostreamEEFvRN4llvm11raw_ostreamEE`C:CC:C;C;C`ApAAAN4llvm3mca16InstrPostProcessECx;CN4llvm3mca11CodeRegionsEC;C;CqAmAP@P@P@<CqAPAПApAУA<CqAAAPAAN4llvm3mca15AnalysisRegionsE0C<C;CN4llvm3mca17InstrumentRegionsE0C<C;C(=CAAN4llvm3mca10CodeRegionEC=Cx=CAAN4llvm3mca16InstrumentRegionE0CX=C(=CH>C`APAAN4llvm3mca29AnalysisRegionCommentConsumerEN4llvm3mca18MCACommentConsumerEN4llvm18AsmCommentConsumerEC>C0C=C >C0C=C0>C>C`ApApAN4llvm3mca31InstrumentRegionCommentConsumerE0C>C0>CN4llvm3mca19CodeRegionGeneratorEC>CN4llvm3mca22AsmCodeRegionGeneratorEC?C>C0C0E0C0E?Y@?$@{Gzt?@@C*BBPA*B B*B*B*B+B`,B@ B,BPfB,BN4llvm3mca18BottleneckAnalysisE0C@CCCAC@@1BN4llvm13format_objectIJdEEE0C@CCAC:B:B1B`1B:B*B*B*B:B;B@P;BCB2BCBN4llvm3mca18DispatchStatisticsE0CACCN4llvm3mca19InstructionInfoViewE0CACCC`BC@dBN4llvm13format_objectIJhEEE0C@BCCBC*B`dBpdBdB:B*B*B*BeBdB@FBdBXBCBCC*B`dBpdBdB:B*B*B*BeB@eB@hBiBPfBCBN4llvm3mca15InstructionViewE0CCCCpDC*BlB0kBdB:B*B*B*BPvBvB@lBvBvBwBN4llvm3mca22RegisterFileStatisticsE0CHDCC8EC*B`dB}BdB:B*B*B*BB`B@B`BBCBN4llvm3mca20ResourcePressureViewE0CECCCFC*BBPBdB:B*B*B*BBРB@0BBvB BN4llvm3mca27RetireControlUnitStatisticsE0CECCFCBBPBdB:B*BBBBB@BPBvB`BN4llvm3mca19SchedulerStatisticsE0CFCCGC*BBBdB:B*B*B*BBB@@B@BBCBN4llvm3mca11SummaryViewE0CpGCC{BmBBB(B8BHC*BB0BdB:B*BpB*B BB@PBPBpBCBN4llvm3mca12TimelineViewE0CtHCCC%s:%d: %s: Assertion '%s' failed.
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